When Micro Meets Nano

Small things considered

In the beginning was Richard Feynman.

Feynman, of course, was the Caltech professor and eventual Nobel Laureate in physics who tipped the world to the wonders of "nanotechnology" in a seminal speech at an annual meeting of Caltech's American Physical Society. Feynman titled his speech "There's Plenty of Room at the Bottom." It was four days after Christmas, 1959.

More recently, it seems that almost every other day is Christmas in the world of nanoscience, as "breakthrough" announcements from around the world pile up like so many gifts under the tree. Whether or not they're actual gifts to the field or just baubles remains to be seen, because the world of rearranging atoms is nothing if not tricky, particularly in the thin-film industries.

"Why cannot we write the entire 24 volumes of the Encyclopedia Brittanica on the head of a pin?" Feynman famously asked. For MICRO readers—burrowing into their work like the ants that appear in so many micrographs to show scale—a better question is, "Why can't we make all those red boxes in the International Technology Roadmap for Semiconductors go away?"

Certainly, researchers both public and private are plodding toward that goal, with governments and universities around the world playing key roles. Since its 2000 launch by the Clinton administration, the National Nanotechnology Initiative (NNI) has helped start research centers at more than 30 universities. This effort includes the recent launch of the California NanoSystems Institute, a collaboration among UCLA, UC Santa Barbara, and SPM specialists such as Digital Instruments/Veeco.

SOURCE: ITRS; ILLUSTRATION BY JAMES SCHLESINGER

NNI has inspired Japan to pursue its own program to the tune of $410 million annually, according to one of the initiative's key backers. In late September Taiwan said it will invest approximately $290 million in a research center. Targeted to open in July 2002, the center will tap the expertise of some 100 researchers, who will focus on nanomaterials research and nanoelectronics development. The Delft University of Technology in the Netherlands announced in early October that it has developed the world's first SRAM with transistors made of carbon nanotubes.

Five advances make nanoscience possible, asserts Zhong Wang, director of Georgia Tech's Center for Nanoscience and Nanotechnology. Wang himself has made a splash working with carbon nanobelts. The enabling advances are:

• The development of scanning and transmission electron microscopes, as well as scanning tunneling and atomic force microscopes.
• The challenge of nanoscale devices and engineering posted in the ITRS.
• The introduction of new structures such as carbon nanotubes and fullerenes.
• An understanding of quantum mechanics and device structures such as quantum dots that tap into this understanding.
• Powerful computers and advanced software for simulations.

Some experts predict the entire semiconductor industry will have shifted to nanotechnology in 10 to 15 years, rocketing past the 100-nm mark in 2003. Others are saying hold on a nanosecond. Susan Sinnott, cochairperson of the recent Ninth Foresight Conference on Molecular Nanotechnology, notes that the word "nanotechnology" itself "is somewhat controversial." Much of the talk about the field, particularly in the popular press, tends to focus on nanobots. Others think of atom-by-atom self-assembly, as you'll see in some of the articles herein, but, asserts Sinnott, "Most scientists and engineers working on real projects are going to reject that approach."

Sinnott, a professor in the Department of Materials Science and Engineering at the University of Florida, recalled a comment from Phaedon Avouris, a nanoscience pioneer at IBM who also appears in these pages, about the drudgery of making molecular devices from carbon nanotubes. Building such chips for, say, cell phones an atom at a time is just too slow. "'If we had to do this atom by atom we'd get killed,'" she quotes Avouris as saying.

Not surprisingly, the more Buck Rogers–like claims tend to draw the most attention. Some experts believe nanobots will reshape the world. Others such as Richard Smalley, a nanoscience pioneer and Nobel Prize winner in chemistry, has spoken often of "why they won't work," Sinnott says.

Sinnott emphasizes that some believe there is no new technology, since work is still basically in the proof-of-concept stage. MICRO's readers, she says, will be interested in two areas: quantum dots, and making transistors and circuits out of nanoscale wires.

"Quantum dots can be used as memory and computing devices," she points out. "Instead of having just zero or one you can have a range of values. This really holds promise and has been demonstrated that it's not a flash in the pan." The question now is "how to take it from the proof-of-concept stage in a cost-effective manner."

What about yields in this world of infinitesimal sizes, quantum physics, and nonsilicon materials, you ask? Well, as far as carbon nanotubes are concerned, Sinnott says the problem in electronic applications is the need to arrange them just so. "People don't know how to control production. That's a Holy Grail. Nobody knows how to control the structure so that you can control the properties."

Sinnott is optimistic that the industry's concerted efforts will solve this problem soon. She and a colleague said as much in a recent technical article. "I would hypothesize that within the next five years someone will figure it out. My coauthor and I wrote that right now a lot of companies are scaling back on large-scale production of big applications. What we hypothesize in our article is that at some point someone will develop a killer app that is so promising that people will go ahead and scale up. You'll find Avouris's work [at IBM] right up there."

In other words, Feynman is right.

—John Conroy

A quantum leap?

IBM has taken work with carbon nanotubes to the next level with the creation of a logic circuit within a single molecule. Big Blue made the announcement in late August 2001, an eon ago given the rapid pace of nanotechnology research. IBM researchers pioneered an n-type nanotube transistor. It also integrated p-type and n-type field-effect transistors to make a voltage inverter, or NOT logic gate. Placing the nanotubes in a vacuum converts a p-type nanotube transistor into an n-type, IBM says. The p- and n-type transistors in series were able to create the voltage inverter.

Phaedon Avouris, manager of nanometer-scale science and technology for IBM Research, is encouraged that the gain of the inverter is greater than one. This characteristic means that the output of the logic gate can be used to power other logic gates or circuits in the nanotube. Placing circuits along the length of the nanotubes saves on wiring and makes for smaller devices, notes Avouris, who is the lead scientist on the project. A nanotube, seen in the molecular model above, measures 5 to 10 atoms wide.

"At this point our objective, of course, is to find a technology that can succeed or supplement silicon in the future," he says. "We are getting to the limits [of silicon technology] in maybe 20 years or so. Molecular electronics is something that most people think can replace silicon [because] it has a number of advantages. Among the different molecular systems are carbon nanotubes, and because of their properties they seem the most promising."

The device of choice has been the FET, Avouris says, because "basically, the field-effect transistor seems to be the best choice. There are other people in the industry and academia who play with diodes and so on, but we don't feel this is worthwhile really. These things have been tried back in the 50s and so on, and they don't offer the control that you need."

Avouris emphasizes that the results of the nanotechnology research must be "better than silicon." Furthermore, given the un-nanolike sums needed to manufacture microchips, it can't be "twice better technically and 10 times more expensive."

Nanotubes appeal to toilers in the research vineyards because of their one-dimensional character, Avouris says. "They are essentially immune to scattering." A one-dimensional device can only reverse the momentum from forward to backward. "That requires a very big momentum change." Electrons can thus "propagate without being scattered [and] that has a lot of implications if you don't have the resistance or power dissipation, heating, and all that other stuff."

Avouris and his team expect the development process to extend another two or three years. The work requires a fundamental shift in thinking. Unlike the transition to 300-mm wafers or even copper processes, getting production-worthy results from the lab to the fab means less of a focus on equipment than on materials. "It's not tools really," says the nanotechnology pioneer. "It's more the materials. First of all, the materials are not pure."

Although some skeptics believe self-assembly is overrated as a technique, Avouris is a believer in the technique. Even though one of IBM nanotechnology's early parlor tricks was to use AFM to spell its name (above left) with individual atoms, the atom-by-atom description rankles Avouris. "The other major thing we need to do is avoid having to place nanotubes and manipulate them in any direct way but have them follow natural processes such as self-assembly." This approach will ensure needed accuracy and reduce production costs, he asserts.

"That requires that we understand better the forces of interaction between nanotubes and other materials and then choose materials that have a high affinity for nanotubes and be able to build these devices in a natural way," Avouris says, "rather than build new machines that place nanotubes where you want them."

Is he optimistic that the research with nanotubes will prove fruitful? "I hope so, because there's so much effort in that direction. There has to be a breakthrough." Why, because of all the brainpower behind the directed effort with the minuscule molecules? "Yes, that. Plus serendipity."

ILLUSTRATION BY JAMES SCHLESINGE

A big step in a small world

Scientists at Bell Labs have succeeded in making organic transistors just one molecule thick. As conventional chipmaking creeps closer to its physical limitations, the research team says the breakthrough proves that molecular-scale transistors are a viable alternative to silicon-based counterparts. The transistors are approximately 100 times smaller than standard transistors.

Bells Labs' researchers Hendrik Schon, Zhenan Bao, and Hong Meng used carbon-based materials called thiols, instead of carbon nanotubes, to make the devices. In addition, the team says that self-assembly and an elegant design solve a problem common to molecular-scale transistors. Because the electrodes are separated by only a few molecules, attaching contacts to the transistors becomes messy. But, says Bao, an organic chemist, "We solved the contact problem by letting one layer of organic molecules self-assemble on one electrode first, and then placing the second electrode above it. For the self-assembly we simply make a solution of the organic semiconductor, pour it on the base, and the molecules do the work of finding the electrodes and attaching themselves."

The schematic above shows the design of the molecular-scale transistor. Schon, Zhenan, and Meng first made a notch in a silicon wafer and then placed a layer of gold at the bottom of the notch to form one side of the transistor. The team dipped the substrate in the carbon-based thiols. During evaporation, the molecules formed a single layer on the gold. As the schematic shows, another gold layer acts as the other side of the transistor. The channel length of the transistors is 1–2 nm.

A CLOSER LOOK: Bell Lab scientists Hendrik Schon, left, and Zhenan Bao discuss their work on molecular-scale organic transistors. PHOTO COURTESY OF BELL LABS

An expert in molecular electronics at Penn State calls the design "a beautiful, simple, and clever approach," according to Bell Labs. "It circumvents many of the difficulties inherent in other nanofabrication approaches," says Professor Paul Weiss, who also told USA Today, "they've knocked down a couple of barriers to nanotechnology." Self-assembly of the transistors offers an alternative path that doesn't require lithography. Quantum effects such as tunneling have not impaired performance, according to a pleasantly surprised Schon.

Bell Labs claims the development is a more practical technique than the use of carbon nanotubes, which are difficult to place precisely. Again, self-assembly is the key because it enables scientists to direct the molecules where they want them. The next step is to shrink the number of molecules in the switching layer.

Gearing up

A microgear produced by the Karlsruhe Research Center in Germany rests on the leg of an ant to show the scale of the component. Researchers at the center's Institute of Microstructure Technology use the LIGA process to make the microgear. LIGA encompasses deep x-ray lithography, electroforming, and plastic molding to mass-produce microstructures. The lithographic and electroforming processes produce metal microstructures used as molding tools. The institute employs advanced microvacuum embossing as its primary molding technique. Materials included epoxy phenol resins, PVDF, and polysulfones. The technique enables researchers to place plastic or metal microstructures directly on top of circuits. By combining the LIGA technique, silicon microelectronics, and micromechanics, this integrated approach avoids the drawbacks of monolithic integration and the high costs of hybrid structures, the institute says.

PHOTO COURTESY OF THE KARLSRUHE RESEARCH CENTER

Looking for the perfect wave

Georgia Tech researchers are developing a method that may solve a key challenge for photolithography in the era of nanometer-scale chip production. Called surface monolayer initiated polymerization (SMIP), the technique grows resist on top of an extremely thin polymer layer that is activated by light. The ultrathin layer permits the use of wavelengths as advanced as extreme UV and x-rays, according to researcher Dennis Hess, a professor in the university's school of chemical engineering. Hess and two colleagues, Cliff Henderson and Laren Tolbert, have so far used the technique to create 1.5-µm patterns with 15-µm spacings.

Getting the polymerization method to the nanometer level is the next hurdle to overcome, Hess says. "Can we perform this polymerization in a time frame that's consistent with the kind of lithography process needed in the industry? Right now, the time frames are long." The researcher says they're trying to determine "why polymerization occurs really slowly. These are free-radical reactions, so in principle they should go fairly quickly." Even though the resist materials "should get increasingly robust," questions remain over the appearance of the pattern's sidewalls. "The pattern edge doesn't look nice and smooth at this point, at least from the SEM that we took, but, again, this is our second or third shot at this thing." Hess speculates that a production-worthy SMIP process will be ready within three to five years.

The schematic above left shows the traditional positive-tone lithography method. The illustration below depicts the SMIP process for both negative- and positive-tone pattern formations. In both cases, an initiator layer is formed through the reaction of an initiator molecule with hydroxyl groups on the wafer surface. If this layer is then selectively exposed to UV light through a photomask in the presence of a monomer, polymerization occurs in the regions exposed to the light for the negative-tone method, Hess says. If exposure occurs in the presence of oxygen, the initiator is inactivated in the exposed areas. Heating the initiator in the presence of a monomer causes polymerization in the remaining areas in the positive-tone method. Polymerization is a chemical reaction in which two or more molecules combine to form larger molecules that contain repeating structural units.

"We started this research a few years ago when we started to investigate how we could directly form patterns," the researcher says. They eventually determined they could consolidate the structures to act as a good resist mask. "We know we can do surface-initiated polymerization. We know we can consolidate these structures. The questions are, can we do it in a timely manner and can we get decent profiles? Can we print real small patterns?"

SCHEMATICS COURTESY OF GEORGIA TECH

CMOS; CMOS run

The end of CMOS scaling is nigh. However, "the specific combination of factors that will end scaling is not known," notes the Semiconductor Research Corp. in a 2001 position paper on the industry's nanotechnology needs. The report, Semiconductor Industry Research Needs in the Nanotechnologies, covers physics, chemistry, materials, and devices, as well as molecular and nanoscale fabrication methods.

"Leading-edge production in the industry is approaching the 100-nm technology node and within 10 to 15 years we expect feature sizes in production to be approaching 10 nm," note the authors. "In order to continue the pace of semiconductor technology forecast by the [International Technology Roadmap for Semiconductors], it will be essential that new physical understanding be developed for nanoscale processes, materials, interfaces, design methods, and system architectures. We believe that the National Nanotechnology Initiative can be an important resource for the industry as it faces these challenges." The report lists nanoscale topics needing substantial research if the semiconductor industry is to meet ITRS goals.

As an example of the demands placed on fab equipment, the report cites the need for systems that operate "beyond optical lithography limits" in order to make 25-nm devices. SRC foresees "an extremely costly R&D effort" will be required so that the proper tools are ready "in about one decade."

In addition, the performance of the device itself poses problems. The scaling of the gate oxide enhances device performance, but tunneling through the gate oxide creates "unacceptably large off currents" as gate thickness reaches 1 nm through scaling, the report notes. The off currents result in dramatically increased "quiescent power consumption" that makes the device impractical for analog uses because of high noise levels.

The authors—Ralph Cavin, Victor Zhirnov, and George Bourianoff—predict that the evolution of bulk planar CMOS devices "will plateau" around the 25-nm node. The devices will be used primarily in products where performance, not power consumption, is the primary driver.

Technology options may be available to extend CMOS technology beyond the 25-nm node, according to the authors. Among the options are dual-gate devices, which can increase the current drive for the transistor. Dual-gate device processing, however, is complex and demanding. It requires, for example, precise alignment of the gates, the authors note. Silicon-on-insulator technology and cooled devices are two other options for extending the CMOS realm to, perhaps, the 10-nm node.

Functional scaling gradually will supplant density scaling, and the focus will shift to "the effective utilization of transistors and interconnects." The resulting new functions added to CMOS processing will lead to the development of hybrid technology integration "at the die, package, and board levels."

Measure for measure

What constitutes the nanoscale challenge for the leader in the field of yield-management gear and process control tools? "Sub-0.13 µm," responds Fabio Pintchovski of KLA-Tencor. "There's a cliff between 0.13 µm and 0.10 µm. That's the barrier."

The senior vice president of technology, strategic business development, notes that the world of those extremely thin hollow cylinders known as carbon nanotubes in particular pose some distinct challenges for manufacturers of defect monitoring, surface measurement, and electron beam metrology gear. "Nanotechnology is a different universe," Pintchovski acknowledges.

Standard metrological processes such as optical phase measurement may prove ineffective in this new universe, says Arun Chatterjee, senior director, strategic business development. One of the issues is the "very narrow lines. How do you measure that repeatedly?" In addition, the very thin films and minuscule gate electrodes—"you're talking in terms of 5 nm"—mean that "somewhere the current approach to maintaining these metrologies...may not work."

On the defect detection side, Chatterjee points out that maintaining present yield levels at the 180-nm node requires controlling "one to three defects per billion via holes." To maintain present yields at the 100-nm node means finding one defect in 10 to 15 billion via holes. You could measure 10 billion times and find one fault, but that's not really cost effective."

Chatterjee believes the industry certainly has a handle on physical defects. "We can control that in the 90% range, and we've generally improved the yield quite a bit." Electrical defects are the ones "that really matter." This raises metrology-related concerns, he points out. Particularly in the nanotechnology realm, standard methods of gathering yield statistics become less effective. "We need to introduce stochastic statistics," he says, adding that KLA-Tencor is developing solutions for these issues.

"If you're just trying to measure defects," emphasizes Pintchovski, "you get overwhelmed by numbers." The best approach is to "stop counting physical defects and focus only on the ones that really cost you." KLA-Tencor tries to stay "very aggressively in contact with its customers" and has optical CD ellipsometry systems that will measure very thin films and gate CDs at smaller and smaller geometries, he asserts.

Pintchovski says the supplier has been tracking the development of carbon nanotubes, introduced in the early 90s, for several years. He calls the technology "very green," adding "a lot of fundamental questions are still to be resolved. Can you make a transistor out of the nanotube? Yes. Can we make a small SRAM cell? Yes. Now comes the elbow grease part."

Mark your calendar

NSF and the National Nanotechnology Initiative will sponsor a one-day conference
March 19, 2002

Small Wonders: Exploring the Vast Potential of Nanoscience

will be held at the Ronald Reagan Building and International Trade Center, Large Amphitheater, Washington, DC Hours are 8:30 a.m. till 5:30 p.m.

Seventeen speakers from universities, SRC, and industry research labs are scheduled to appear. Richard Smalley, Nobel Laureate and a nanoscience pioneer, is set to deliver the keynote address. Conference topics will cover materials, devices, instrumentation, electronics, and medicine. Other sessions will address education, economics and the view from abroad, as well as the societal issues raised by nanotechnology. A panel discussion involving luminaries in the nanoscience field will close the conference. Joseph Bordogna, deputy director of NSF, will moderate.

Information: Mihail Roco; mroco@nsf.gov

Big money, big plans

The U.S. government expects to pump approximately $519 million into nanotechnology R&D in the 2002 fiscal year. The investment in the National Nanotechnology Initiative (NNI) represents a 23% increase over the FY01 budget of $422 million. Eight federal departments and agencies will use the requested funds in five areas: fundamental research, Grand Challenges, centers and networks of excellence, and research infrastructure. The fifth area covers the ethical, legal, and social implications of nanotechnology as well as an exploration of workforce programs.

NSF has requested the largest amount at $174 million, followed by the Department of Defense at $133 million. The NSF funds will support a range of research and educational work in nanoscale science and technology. Among the foundation's five focus areas are basic research and education with an emphasis on biosystems and explorations of nanoscale structures, novel phenomena, and quantum control. A $7.9 million budget request for Grand Challenges will be used to fund interdisciplinary activities on long-term challenges such as nanoscale electronics and optoelectronics.

SOURCE: NATIONAL NANOTECHNOLOGY INITIATIVE;
LLUSTRATION BY JAMES SCHLESINGER

NIST has requested $17.5 million, an increase of $7.5 million over its FY01 budget. The institute's laboratories will use the funds to develop enabling measurement, standards, and data for nanomagnetics, nanocharacterization, and new information technologies. NIST expects R&D efforts in nanomagnetics will provide measurement and standards for current near-term nanotechnology applications in the semiconductor, communications, and healthcare industries.

The eight federal bodies will collaborate in several areas in order to identify the most promising research directions and fund complementary fields of R&D. Among the other shared goals are developing a balanced nanotechnology infrastructure and a trained workforce. The National Science and Technology Council's Subcommittee on Nanoscale Science, Engineering, and Technology is coordinating the collaborative efforts, which are depicted in the accompanying table.

Up an atom

Atomic layer deposition—a technique related to its CVD cousin—can extend the capabilities of existing tool sets deep into the generation of devices below 100 nm. Front-end equipment manufacturers such as Genus, ASM, and Applied Materials have begun selling ALD systems to clients in the semiconductor industry and other industries. Applied has introduced a chamber for depositing thin, high-purity films at temperatures much lower than similar CVD processes, while Genus already has installed ALD-based tools at six customer sites. The company recently sold a Lynx2 system to Read-Rite, a manufacturer of thin-film heads, for deposition of aluminum oxide thin films in the gap component of magnetic heads.

"We clearly have a good position in what I call the 'beta-level activity' marketplace," says Tom Seidel, CTO of Genus. "Our focus has been on capacitor applications."

ALD has both advantages and disadvantages in relation to CVD, according to industry experts. Chemical vapor deposition requires a high substrate temperature to reach an acceptable deposition rate if gas-phase reactants are not very reactive. Using more "reactive" reactants may negatively affect the quality of the film layer. ALD's advantage is that it can be used to separate individual reactants through surface adsorption. Ultimately, the process permits the growth of thin solid films one layer at a time at moderate temperatures.

Proponents such as Seidel point out that ALD offers film uniformity over large substrates with highly conformal monolayers. "Conformality is a key enabling factor," the CTO emphasizes. "ALD when practiced well provides this conformality. In our data we show trench features that are 100% conformal at 0.1 µm and at 20:1 aspect ratios."

Seidel acknowledges that ALD's main drawback is low throughput. "With aluminum oxide, the current throughput is more or less acceptable for pilot production, in our opinion. Customers always want more throughput than 10 to 15 wafers per hour per chamber, or per module, but that's certainly competitive with many other process-throughput benchmarks." Some challenges loom with respect to other, less mature and somewhat more exotic films such as metal oxides or metal nitrides, Seidel notes.

"In atomic layer deposition you don't mix the chemicals over the wafer," he explains. "You introduce one chemical—what people call a half reaction—then another chemical. Those two reactions make a whole reaction, and you get a compound. There's a certain amount of delay between one and the other." He believes that the throughput issues for these other films will be resolved over time.

Regarding yields, Seidel says ALD has created a bit of an industry buzz because of a potential defect-related benefit. "This is not proven, but conceptually there's the expectation with ALD's conformal coating ability that, if you had a small particle of about 10 Å, you could seal it, coat it, lock it in, and you still may end up having no defect there."

Thus, the old industry practice of removing a wafer from "a really dirty process," cleaning it, and running it through a second deposition might not be necessary. "Atomic layer deposition can conformally coat where the gases can get to, and if the gases can get under particles, it can coat the particles up from below."

IMAGE COURTESY OF OAK RIDGE NATIONAL LABORATORY